The density of a DRAM can be most suitably increased among various kinds of semiconductor memory devices, and the DRAM is widely used for a main memory of a computer and the like. The prime reason that the density of the DRAM can be most suitably increased is that the structure of the memory cell of the DRAM is remarkably simple as compared with that of other semiconductor memory devices. In other words, the memory cell of the DRAM consists of one capacitor and one MOS transistor, and stores information based on a charge stored in the capacitor. Charging to and discharging from the capacitor is controlled by a MOS transistor whose gate electrode is connected to a word line. When the MOS transistor is turned on, a storage electrode of the capacitor is connected to a bit line, thereby reading or writing information.
Because the memory cell of the DRAM stores information based on the charge stored in the capacitor, the stored information disappears due to a leaked current, when refresh operation is not carried out periodically. Therefore, before the information disappears due to the leakage current, all memory cells need to be refreshed. A cycle of refreshing all memory cells (=tREF) is determined as 64 msec, for example, based on a specification.
This means that time equal to or more than tREF is required as the time for holding information of each memory cell. Therefore, a memory cell of which information-holding time is less than tREF is a “refresh defective cell”. An address corresponding to the refresh defective cell is handled as a “refresh defective address”. Usually, a refresh defective address is relieved by replacing the refresh defective cell with a redundant memory cell, and chips including these redundant memory cells are shipped as normal chips.
However, as miniaturization and density increase continue, the number of refresh defective cells included in one chip increases greatly. Consequently, in recent years, the number of redundant memory cells to be prepared for one chip and the number of fuse elements (ROMs) for storing a defective address increase remarkably. These increases in the number of memory cells and fuse elements prevent the increase in the density of the DRAM.
In order to solve the above problem, the refresh defective cell of which information holding time is slightly short of tREF can be saved by increasing the frequency of executing the refresh operation, instead of replacing the refresh defective cell with the redundant memory cell. For example, when the refresh defective cell has the information holding time which is short of tREF (=64 msec, for example) and is equal to or above tREF/2 (=32 msec, for example), the information can be saved by doubling the frequency of executing the refresh operation, instead of replacing the refresh defective cell with a redundant memory cell.
A technique of saving the refresh defective cell by increasing the refresh frequency of only a specific memory cell is described in Japanese Patent Application Laid-open No. 2000-132963. According to this prior art, when an address of which only a part of bits is different from the refresh defective address is given from the refresh counter, not only a word line corresponding to the address shown by a refresh counter but also a word line corresponding to the refresh defective cell are simultaneously activated. This technique is known as a multiple refresh technique.
However, when the word line corresponding to the address shown by the refresh counter and the word line corresponding to the refresh defective cell are activated simultaneously, approximately two times of the current that flows in the normal refresh operation flows. This large current can be momentarily secured when the normal power supply circuit is used. However, when conditions that require a large current appear continuously, the power supply potential and the ground potential vary greatly, resulting in the occurrence of an erroneous operation.
In order to prevent a voltage variation due to a large current, the power supply circuit needs to be increased. In this case, the area occupied by the power supply circuit increases, and this interrupts the increasing of the density.